Freescale Semiconductor /MKL82Z7 /TPM2 /CONF

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CONF

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)DOZEEN 0 (00)DBGMODE 0 (0)GTBSYNC 0 (0)GTBEEN 0 (0)CSOT 0 (0)CSOO 0 (0)CROT 0 (CPOT)CPOT 0 (0)TRGPOL 0 (0)TRGSRC 0TRGSEL

TRGPOL=0, DBGMODE=00, CSOO=0, GTBEEN=0, DOZEEN=0, GTBSYNC=0, CSOT=0, TRGSRC=0, CROT=0

Description

Configuration

Fields

DOZEEN

Doze Enable

0 (0): Internal TPM counter continues in Doze mode.

1 (1): Internal TPM counter is paused and does not increment during Doze mode. Trigger inputs and input capture events are also ignored.

DBGMODE

Debug Mode

0 (00): TPM counter is paused and does not increment during debug mode. Trigger inputs and input capture events are also ignored.

3 (11): TPM counter continues in debug mode.

GTBSYNC

Global Time Base Synchronization

0 (0): Global timebase synchronization disabled.

1 (1): Global timebase synchronization enabled.

GTBEEN

Global time base enable

0 (0): All channels use the internally generated TPM counter as their timebase

1 (1): All channels use an externally generated global timebase as their timebase

CSOT

Counter Start on Trigger

0 (0): TPM counter starts to increment immediately, once it is enabled.

1 (1): TPM counter only starts to increment when it a rising edge on the selected input trigger is detected, after it has been enabled or after it has stopped due to overflow.

CSOO

Counter Stop On Overflow

0 (0): TPM counter continues incrementing or decrementing after overflow

1 (1): TPM counter stops incrementing or decrementing after overflow.

CROT

Counter Reload On Trigger

0 (0): Counter is not reloaded due to a rising edge on the selected input trigger

1 (1): Counter is reloaded when a rising edge is detected on the selected input trigger

CPOT

Counter Pause On Trigger

TRGPOL

Trigger Polarity

0 (0): Trigger is active high.

1 (1): Trigger is active low.

TRGSRC

Trigger Source

0 (0): Trigger source selected by TRGSEL is external.

1 (1): Trigger source selected by TRGSEL is internal (channel pin input capture).

TRGSEL

Trigger Select

1 (0001): Channel 0 pin input capture

2 (0010): Channel 1 pin input capture

3 (0011): Channel 0 or Channel 1 pin input capture

4 (0100): Channel 2 pin input capture

5 (0101): Channel 0 or Channel 2 pin input capture

6 (0110): Channel 1 or Channel 2 pin input capture

7 (0111): Channel 0 or Channel 1 or Channel 2 pin input capture

8 (1000): Channel 3 pin input capture

9 (1001): Channel 0 or Channel 3 pin input capture

10 (1010): Channel 1 or Channel 3 pin input capture

11 (1011): Channel 0 or Channel 1 or Channel 3 pin input capture

12 (1100): Channel 2 or Channel 3 pin input capture

13 (1101): Channel 0 or Channel 2 or Channel 3 pin input capture

14 (1110): Channel 1 or Channel 2 or Channel 3 pin input capture

15 (1111): Channel 0 or Channel 1 or Channel 2 or Channel 3 pin input capture

Links

() ()